Many floating-point multiplier circuits used in high performance processors generate the "sticky-bit" to generate the rounding action of the raw result of the multiplication operation. The sticky-bit is defined to be equal to zero only if, in the raw result, the value of all of the bits to the right of the "round-bit" (i.e., the round bit is typically defined as the bit to the right of the least significant bit) are zero. As is well known in the art of binary floating-point multipliers, the sticky-bit is used to break a "tie" condition when the raw value is exactly half way between the rounded-up value and the rounded-down value. Consequently, if the sticky-bit is zero and the round-bit is one (i.e., the "tie" condition), then during the rounding action the least significant bit is incremented if the least significant bit is a one; otherwise, the raw result is truncated after the least significant bit. This definition of the sticky-bit stems from the "IEEE Standard for Binary Floating-Point Arithmetic", ANSI/IEEE Std 754-1985. In particular, the IEEE 754 Standard specifies that the default rounding mode is the "round to nearest", which is commonly referred to as the "round to nearest/even" because in a "tie" case (i.e., when the raw value is equally between the round up value and the round down value), the "round to nearest" mode specifies that the least significant bit shall be a zero (which makes the value "even" instead of "odd").
A typical method to perform the "round to nearest/even" action adds a 1/2 to the least significant digit of the raw multiplication result (i.e., a "round to nearest/up"), and truncates the remaining digits to the right of the least significant digit. Then, in this conventional method, the raw result is checked to determine whether a "tie" condition exists. If a "tie" condition exits, the least significant digit is set to zero. This conventional method can be implemented in binary arithmetic by adding a one to the round-bit and then performing a logical-OR operation of all of the bits remaining to the right of the round-bit. The output bit of this logical-OR operation is called the sticky-bit. This process is described in more detail by M. Santoro et al in "Rounding Algorithms for IEEE Multipliers", Proceedings of the 9th Symposium on Computer Arithmetic, September 1989, pp. 176-183, which is incorporated herein by reference.
In the following example, the IEEE 754 "round to nearest" mode is to be performed to round to the nearest (2.sup.-2)th bit on the raw binary number 0.101XXX (where each X represents a zero or a one). Accordingly, the least significant bit (LSB) in this example is the zero and the round bit is the zero next to the first X. Of course, the LSB can be rounded up to a one or else stay at zero, depending on the value of the bits (i.e., the Xs) to the right of the round bit. Using the "round to nearest/up" definition (i.e., incrementing the round bit), the correct "round to nearest/even" value is generated, except when all of the Xs are zero. More specifically, when all of the Xs are zero, the raw value is 0.101000. Using the "round to nearest/up" definition results in a rounded value of 0.11. However, the value 0.101000 is exactly between the possible rounded values of 0.11 and 0.10 and, thus, should be rounded to 0.10 using the "round to nearest/even" mode. Accordingly, to generate the correct rounding action, the condition in which all of the Xs are zero must be detected (which is the definition of the sticky-bit provided above).
FIG. 1 is a diagram of a typical conventional circuit 100 used to generate the sticky-bit. The circuit 100 includes a register 104 and an OR gate 106. The register 104 stores the LSB in a cell 108 and the round bit in an adjoining (to the right) cell 110. Generally, the register 104 stores several additional bits to the right of the round bit. The OR gate 106 is connected to receive all of these bits to the right of the round-bit in the resultant fraction generated by the multiplier circuit 102. Of course, the multiplier circuit 102 must first generate the raw multiplication result before the circuit 100 can generate the sticky-bit. Consequently, the sticky-bit generation is undesirably in the critical path of the multiplication operation, which detrimentally impacts the performance of the multiplier. Accordingly, there is a need for generating the sticky-bit without waiting for the raw multiplication result to be generated, thereby taking the sticky-bit generation out of the critical path.